Power Integrity Measurements

High-speed digital circuit designs require sophisticated power supply decoupling to ensure signal integrity. High-speed serial data lines in Serializer/Deserializer (SERDES) implementations can run at gigahertz speeds and must be protected from power supply noise to ensure error-free data transport. Controlling the impedances of the power planes on a circuit board is critical for noise reduction. Too much capacitive decoupling results in an excessively low impedance and is just as bad as too little decoupling. Calculation of the appropriate decoupling networks to achieve flat impedance over frequency requires a careful measurement of power plane impedance over a wide frequency range.

This measurement is easily accomplished with a Copper Mountain Technologies Vector Network Analyzer. Specifically, the Compact S5065 or S5085 are capable of measuring from 9 kHz to 6.5 GHz and 8.5 GHz respectively. With a common mode transformer from Picotest J2102B inserted in the measurement line to mitigate the effect of cable shield resistance it is possible to measure power plane impedances in the milli-ohm range and verify impedance flatness. Decoupling networks can be changed on the bench and immediately verified. The imperfect behavior of decoupling capacitors will be readily apparent.

The Picotest J2102B transformer maintains a good 50 Ω match from 9 kHz to approximately 300 MHz and when used in the measurement with a CMT VNA it is a simple matter to design and verify the optimal power plane integrity which will allow the highest data rates possible.